Mos ICs and Technology

Features

• This unique free application is for all students across the world. It covers 114 topics of Mos ICs and Technology in detail. These 114 topics are divided in 8 units.
• Each topic is around 600 words and is complete with diagrams, equations and other forms of graphical representations along with simple text explaining the concept in detail.
• This USP of this application is "ultra-portability". Students can access the content on-the-go from anywhere they like.
• Basically, each topic is like a detailed flash card and will make the lives of students simpler and easier.
• Some of topics Covered in this application are:
• 1. Moore's Law.
• 2. Comparison of available technologies
• 3. Basic MOS Transistors
• 4. Enhancement mode Transistor action:
• 5. NMOS Fabrication:
• 6. CMOS fabrication- P-WELL PROCESS
• 7. CMOS fabrication-N-WELL PROCESS:
• 8. CMOS fabrication-Twin-tub process
• 9. Bi-CMOS technology: - (Bipolar CMOS):
• 10. Production of e-beam masks
• 11. Introduction to MOS Transistor
• 12. Relationship between Vgs and Ids, for a fixed Vds
• 13. MOS equations (Basic DC equations):
• 14. Second Order Effects
• 15. CMOS INVETER CHARACTERISTICS
• 16. Inverter DC Characteristics
• 17. Graphical Derivation of Inverter DC Characteristics
• 18. Noise Margin
• 19. Static Load MOS inverters
• 20. Transmission gates
• 21. Tristate Inverter
• 22. Stick diagrams-Encodings for NMOS process
• 23. Encodings for CMOS process
• 24. Encoding for BJT and MOSFETs
• 25. NMOS and CMOS Design style
• 26. Design Rules
• 27. Via
• 28. CMOS lambda based design rules
• 29. Orbit 2um CMOS process
• 30. Resistance estimation.
• 31. Sheet resistance of mos transistors
• 32. Capacitance estimation
• 33. Delay
• 34. Inverter delays
• 35. Formal estimation of delay
• 36. Driving large capacitive load
• 37. Optimum value of f
• 38. Super buffer
• 39. Bicmos drivers
• 40. Propagation delay
• 41. Other sources of capacitance
• 42. Choice of layers
• 43. Scaling of mos devices
• 44. Basic physical design an overview
• 45. Basic physical design an overview
• 46. Schematic and layout of basic gates-Inverter Gate
• 47. Schematic and layout of basic gates-NAND and NOR Gate
• 48. Transmission gate
• 49. CMOS standard cell design
• 50. Layout optimization for performance
• 51. General layout guidelines
• 52. BICMOS Logic
• 53. Pseudo nmos logic
• 54. Other variations of pseudo nmos- Multi drain logic and Ganged logic
• 55. Other variations of pseudo nmos- Dynamic cmos logic
• 56. Other variations of pseudo nmos- CLOCKED CMOS LOGIC (C2MOS)
• 57. CMOS domino logic
• 58. Cascaded voltage switch logic
• 59. Pass transistor logic
• 60. CMOS technology logic circuit structures
• 61. Scaling of MOS Circuits
• 62. Technology Scaling
• 63. International Technology Roadmap for Semiconductors (ITRS)
• 64. Scaling Models and Scaling Factors for Device Parameters
• 65. Implications of Scaling
• 66. Interconnect Woes
• 67. Reachable Radius
• 68. Dynamic and Static Power
• 69. Productivity and Physical Limits
• 70. Limitations of Scaling
• 71. Substrate doping
• 72. Depletion width
• 73. Limits of miniaturization
• 74. Limits of interconnect and contact resistance
• 75. Limits due to subthreshold currents
• 76. Limits due to subthreshold currents
• 77. System
• 78. VLSI design flow
• 79. 3 Structured Design Approach
• 80. Regularity
• 81. MOSFET as a Switch
• 82. Parallel and series connection of switches
• 83. CMOS INVERTER
• 84. NAND gate Design
• 85. NOR gate Design
• 86. CMOS Properties
• 87. Complex gates
• 88. Complex gates AOI
• 89. Circuit Families : Restoring logic CMOS Inverter- Stick diagram
• 90. Circuit Families : Restoring logic CMOS Inverter- Stick diagram
• 91. Circuit Families : Restoring logic CMOS Inverter- Stick diagram
• 92. Restoring logic CMOS Variants: nMOS NAND gate
• 93. Restoring logic CMOS Variants: BiCMOS NAND gate
• 94. Circuit Families :Switch logic: Pass Transistor
• 95. Switch logic: Pass Transistor-nMOS in series
• 96. Switch logic: Transmission gates
• 97. Structured Design-Tristate
• 98. Structured Design-Nonrestoring Tristate

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